Design & Reuse
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137 IP
101
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IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O
IGALVDT13A, TSMC 28nm HPC+ LVDS TX+RX I/O...
102
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IGALVDT14A, TSMC CLN28HPC+ LVDS RX and CMOS Combo I/O
IGALVDT14A contains a receiver (RX) for LVDS interface and bi-derectional double CMOS. It supports the data rate up to 500Mbps. There is one macro ins...
103
0.0
Bi-Directional LVDS with LVCMOS
BiDirectional LVDS IO circuit combines LVDS driver and receiver circuits to enable a single pair of IO pads to function as a 1.5Gbps bi-directional LV...
104
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Library of LVDS IOs cells for TSMC 40G
The nSIO2000_TS40G_2V5_0V9 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/0.9V or 1.8V/0.9V, designed o...
105
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Library of LVDS IOs cells for TSMC 65GP
The nSIO2000_TS65GP_2V5_1V0 library is an IO cells library combining various LVDS and general purpose I/O powered at 2.5V/1.0V or 1.8V/1.0V, designed ...
106
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Library of LVDS Ios cells in HHGrace 130nm~55nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
107
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Library of LVDS Ios cells in HLMC 28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
108
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Library of LVDS Ios cells in SMIC 130nm~28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
109
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Library of LVDS Ios cells in TSMC 180nm~22nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/O. LVDS transmitter a...
110
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Wide-range LVDS Video Interface
Flexible video deserializer capable of receiving 18bit, 24bit, and 30bit video data with embedded sync and control carried over four or five serial LV...
111
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Eight Channel (8CH) LVDS Serializer in Samsung 28FDSOI
The 28FDSOI-LVDS-1250-8CH-TX-PLL is a high performance 8-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parall...
112
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Four Channel (4CH) LVDS Serializer in Samsung 28FDSOI
The 28FDSOI-LVDS-4CH-TX-1250-PLL is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parall...
113
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Four Channel LVDS Serializer in TSMC 130nm
The MXL-SR-LVDS-4CH7-130 is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parallel data ...
114
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Up to 1.25 Gbps DDR LVDS IPs library
130TSMC_LVDS_04 is a library including: • Transmitter LVDS driver (LVDS_TX); • Receiver LVDS driver (LVDS_RX); • Bandgap reference block (LVDS_BG)...
115
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TSMC 40G 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G te...
116
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TSMC 40G 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G technology....
117
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TSMC 40G 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/0.9V or 1.8V/0.9V, designed on the TSMC 40 G technology....
118
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TSMC 40G Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/0.9V o...
119
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TSMC 40LP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP t...
120
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TSMC 40LP 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP technology....
121
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TSMC 40LP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.1V or 1.8V/1.1V, designed on the TSMC 40 LP technology....
122
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TSMC 40LP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/1.1V o...
123
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TSMC 65GP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.0V or 1.8V/1.0V, designed on the TSMC 65 GP t...
124
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TSMC 65GP 2Gb/s RX LVDS IO cell
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125
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TSMC 65GP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.0V or 1.8V/1.0V, designed on the TSMC 65 GP technology....
126
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TSMC 65GP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/1.0V o...
127
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TSMC 65LP 2Gb/s bidirectional LVDS IO cell
The LSB25R/Z cell is a high-speed and low-power LVDS bidirectional transceiver IO cell powered at 2.5V/1.2V or 1.8V/1.2V, designed on the TSMC 65 LP t...
128
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TSMC 65LP 2Gb/s RX LVDS IO cell
The LSR25R/Z cell is a high-speed and low-power LVDS receiver IO cell powered at 2.5V/1.2V or 1.8V/1.2V, designed on the TSMC 65 LP technology....
129
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TSMC 65LP 2Gb/s TX LVDS IO cell
The LST25R/Z cell is a high-speed and low-power LVDS transmitter IO cell powered at 2.5V/1.2V or 1.8V/1.2V, designed on the TSMC 65 LP technology....
130
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TSMC 65LP Combo IO with 2Gb/s LVDS and CMOS GPIO
A Combo cell is an IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO (in, out or bidirectional) powered at 2.5V/1.2V o...
131
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LVDS IO in SMIC 28HKC+, upto 1.6Gbps
LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...
132
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LVDS IO in SMIC 40NLL, upto 800Mbps
LVDS IO can be applied for various die-to-die interface communication. Brite LVDS IO libraries can support data rate up to 2000Mbps with 2.5V and 1.8V...
133
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LVDS IO Pad Set
The LVDS I/O is a three-module design (input, output and reference block). The LDP_OU_675_25V_T is a 2GBit/s LVDS Driver, LDP_IN_675_25V_DN is a 2GBit...
134
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LVDS Rx IP, Silicon Proven in GF 28LPe
A physical layer IP for LVDS Receiver. This IP consists of 20-lane (4 x 4D1C) LVDS receivers and supports up to 1.5Gbps data rate. The input clock is ...
135
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LVDS/ MIPI Combo PHY IP, Silicon Proven in SMIC 40LL
The MIPI-LVDS Combo Tx IP is designed for chips that perform high bandwidth data communication while operating at low power consumption. It can be eas...
136
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LVDS/FPD Link IP, Silicon Proven in GF 28LPe
A physical layer IP for LVDS transmitter. This IP consists of 20-lane (4 x 4D1C) LVDS drivers and supports up to 1.5Gbps data rate. In LVDS mode, both...
137
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LVDS/FPD Link IP, Silicon Proven in GF 65/55LPe
A transmitter for LVDS with a physical layer IP. This IP has 20 lanes (4 x 4D1C) of LVDS drivers and can handle 1.5Gbps of data rate. Both serial and ...